Keynotes

Torsten Hoefler (ETH, Zurich): Portable high-performance Python on CPUs, GPUs, and FPGAs

Abstract: Python has become the de-facto language for scientific computing. Programming in Python is highly productive, mainly due to its rich science-oriented software ecosystem built around the NumPy module. As a result, the demand for Python support in High Performance Computing (HPC) has skyrocketed. However, the Python language itself does not necessarily offer high performance. In this work, we present a workflow that retains Python's high productivity while achieving portable performance across different architectures. The workflow's key features are HPC-oriented language extensions and a set of automatic optimizations powered by a data-centric intermediate representation. We also define a set of around 50 benchmark kernels written in NumPy to evaluate and compare Python frameworks for their portability and performance. We show performance results and scaling across CPU, GPU, FPGA, with 2.47x and 3.75x speedups over previous-best solutions and the first-ever Xilinx and Intel FPGA results of annotated Python.


Hoefler Bio: Torsten is a Professor of Computer Science at ETH Zürich, Switzerland. He is also a key member of the Message Passing Interface (MPI) Forum where he chairs the "Collective Operations and Topologies" working group. His research interests revolve around the central topic of "Performance-centric System Design" and include scalable networks, parallel programming techniques, and performance modeling. Torsten won best paper awards at the ACM/IEEE Supercomputing Conference SC10, SC13, SC14, SC19, EuroMPI'13, HPDC'15, HPDC'16, IPDPS'15, and other conferences. He published numerous peer-reviewed scientific conference and journal articles and authored chapters of the MPI-2.2 and MPI-3.0 standards. He received the Gordon Bell Prize, the Latsis prize of ETH Zurich, as well as both ERC starting and consolidator grants. Additional information about Torsten can be found on his homepage at htor.inf.ethz.ch.


Nele Mentens (Leiden University, Netherlands AND KU Leuven, Belgium): FPGAs for security: three decades of academic research

Abstract: Since the existence of FPGA conferences, many research results have been published on the use of FPGAs for security purposes, mainly in the domains of cryptographic hardware, network security and trusted computing. FPGAs are being used as accelerators of cryptographic algorithms for authenticated encryption, digital signatures and key establishment. Especially in the quantum era, FPGAs are becoming prominent implementation platforms to support post-quantum crypto algorithms that re​ly on larger key sizes and larger memory and computation demands than traditional crypto algorithms. In network security, FPGAs are not only deployed to accelerate cryptographic algorithms, but also to facilitate network monitoring through high-speed search, sort and count functions. In trusted computing, FPGAs form a "patchable" alternative to ASICs, offering hardware-enabled control over the software running on a system. This talk summarizes the past three decades of academic research on the use of FPGAs for security and gives an outlook for future research directions.


Nele Mentens Bio: Nele Mentens is a professor at Leiden University in the Netherlands and KU Leuven in Beligum. Her research interests are in the field of configurable computing and hardware security. She was/is the PI in around 25 finished and ongoing research projects with national and international funding. She serves/served as a program committee member of renowned international conferences on security and hardware design. She was the general co-chair of FPL'17 and she was/is the program chair of FPL'20, CARDIS'20, RAW'21, VLSID'22 and DDECS'23. She is (co-)author in around 150 publications in international journals, conferences and books. She received best paper awards and nominations at CHES'19, AsianHOST'17 and DATE'16. Nele serves as an associate editor for IEEE TIFS, IEEE CAS Magazine, IEEE S&P, and IEEE TCAD.